? semiconductor components industries, llc, 2003 december, 2003 ? rev. 11 1 publication order number: MC74VHC1G50/d MC74VHC1G50 buffer the MC74VHC1G50 is an advanced high speed cmos buffer fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. the internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. the MC74VHC1G50 input structure provides protection when voltages up to 7.0 v are applied, regardless of the supply voltage. this allows the MC74VHC1G50 to be used to interface 5.0 v circuits to 3.0 v circuits. ? high speed: t pd = 3.5 ns (typ) at v cc = 5 v ? low power dissipation: i cc = 1 a (max) at t a = 25 c ? power down protection provided on inputs ? balanced propagation delays ? pin and function compatible with other standard logic families ? chip complexity: fet = 104; equivalent gate = 26 figure 1. pinout (top view) v cc nc in a out y gnd in a out y 1 figure 2. logic symbol 1 2 3 5 4 function table see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information l h a input y output l h sc?88a / sot?353/sc?70 df suffix case 419a pin 1 d = date code vr d tsop?5/sot?23/sc?59 dt suffix case 483 pin 1 d = date code vr d marking diagrams pin assignment 1 2 3 gnd nc in a 4 5v cc out y http://onsemi.com
MC74VHC1G50 http://onsemi.com 2 maximum ratings (note 1) symbol characteristics value unit v cc dc supply voltage ?0.5 to +7.0 v v in dc input voltage ?0.5 to +7.0 v v out dc output voltage v cc = 0 high or low state ?0.5 to 7.0 ?0.5 to v cc + 0.5 v i ik input diode current ?20 ma i ok output diode current v out < gnd; v out > v cc +20 ma i out dc output current, per pin +25 ma i cc dc supply current, v cc and gnd +50 ma p d power dissipation in still air sc?88a, tsop?5 200 mw ja thermal resistance sc?88a, tsop?5 333 c/w t l lead temperature, 1 mm from case for 10 s 260 c t j junction temperature under bias +150 c t stg storage temperature ?65 to +150 c v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) > 2000 > 200 n/a v i latch?up latch?up performance above v cc and below gnd at 125 c (note 5) 500 ma 1. maximum ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute?maximum?rated conditions is not implied. functional operation should be restricted to the recommended operating conditions. 2. tested to eia/jesd22?a114?a 3. tested to eia/jesd22?a115?a 4. tested to jesd22?c101?a 5. tested to eia/jesd78 recommended operating conditions symbol characteristics min max unit v cc dc supply voltage 2.0 5.5 v v in dc input voltage 0.0 5.5 v v out dc output voltage 0.0 v cc v t a operating temperature range ?55 +125 c t r , t f input rise and fall time v cc = 3.3 v 0.3 v v cc = 5.0 v 0.5 v 0 0 100 20 ns/v device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 time, years normalized failure rate t j = 80 c t j = 90 c t j = 100 c t j = 110 c t j = 130 c t j = 120 c failure rate of plastic = ceramic until intermetallics occur figure 3. failure rate vs. time junction temperature
MC74VHC1G50 http://onsemi.com 3 dc electrical characteristics v cc t a = 25 c t a 85 c ?55 t a 125 c symbol parameter test conditions v cc (v) min typ max min max min max unit v ih minimum high?level input voltage 2.0 3.0 4.5 5.5 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 v v il maximum low?level input voltage 2.0 3.0 4.5 5.5 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 v v oh minimum high?level output voltage v in = v ih or v il v in = v ih or v il i oh = ?50 a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 1.9 2.9 4.4 1.9 2.9 4.4 v in ih il v in = v ih or v il i oh = ?4 ma i oh = ?8 ma 3.0 4.5 2.58 3.94 2.48 3.80 2.34 3.66 v v ol maximum low?level output voltage v in = v ih or v il v in = v ih or v il i ol = 50 a 2.0 3.0 4.5 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v in ih il v in = v ih or v il i ol = 4 ma i ol = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 v i in maximum input leakage current v in = 5.5 v or gnd 0 to 5.5 0.1 1.0 1.0 a i cc maximum quiescent supply current v in = v cc or gnd 5.5 1.0 20 40 a ????????????????????????????????? ????????????????????????????????? ac electrical characteristics c load = 50 pf, input t r = t f = 3.0 ns ???? ???? ?????? ?????? ?????????? ?????????? ?????? ?????? t a = 25 c ????? ????? t a 85 c ?????? ?????? -55 t a 125 c ?? ?? ???? ???? symbol ?????? ?????? parameter ?????????? ?????????? test conditions ?? ?? min ??? ??? typ ??? ??? max ??? ??? min ??? ??? max ??? ??? min ???? ???? max ?? ?? unit ???? ? ?? ? ???? t plh , t phl ?????? ? ???? ? ?????? maximum propaga- tion delay, in p utatoy ?????????? ? ???????? ? ?????????? v cc = 3.3 0.3 v c l = 15 pf c l = 50 pf ?? ?? ?? ??? ? ? ? ??? 4.5 6.4 ??? ? ? ? ??? 7.1 10.6 ??? ? ? ? ??? ??? ? ? ? ??? 8.5 12.0 ??? ? ? ? ??? ???? ? ?? ? ???? 10.0 14.5 ?? ?? ?? ns ???? ? ?? ? ???? ?????? ? ???? ? ?????? input a to y ?????????? ? ???????? ? ?????????? v cc = 5.0 0.5 v c l = 15 pf c l = 50 pf ?? ?? ?? ??? ? ? ? ??? 3.5 4.5 ??? ? ? ? ??? 5.5 7.5 ??? ? ? ? ??? ??? ? ? ? ??? 6.5 8.5 ??? ? ? ? ??? ???? ? ?? ? ???? 8.0 10.0 ?? ?? ?? ???? ???? c in ?????? ?????? maximum input ca? pacitance ?????????? ?????????? ?? ?? ??? ??? 4 ??? ??? 10 ??? ??? ??? ??? 10 ??? ??? ???? ???? 10 ?? ?? pf typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (note 6) 8.0 pf 6. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc . c pd is used to determine the no?load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc .
MC74VHC1G50 http://onsemi.com 4 v cc gnd 50% 50% v cc a or b y t plh t phl *includes all probe and jig capacitance c l * test point device under test output figure 4. switching waveforms figure 5. test circuit device ordering information device nomenclature device order number circuit indicator temp range identifier technology device function package suffix tape & reel suffix package type tape and reel size 2 MC74VHC1G50dft1 mc 74 vhc1g 50 df t1 sc?88a / sot?353 / sc?70 178 mm (7o) 3000 unit MC74VHC1G50dft2 mc 74 vhc1g 50 df t2 sc?88a / sot?353 / sc?70 178 mm (7o) 3000 unit MC74VHC1G50dtt1 mc 74 vhc1g 50 dt t1 tsop?5 / sot?23 / sc?59 178 mm (7o) 3000 unit 2for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
MC74VHC1G50 http://onsemi.com 5 tape trailer (connected to reel hub) no components 160 mm min tape leader no components 400 mm min components direction of feed cavity tape top tape figure 6. tape ends for finished goods 1 4.00 2.00 1.75 1.00 min 4.00 figure 7. sc?70?5/sc?88a/sot?353 dft1 reel configuration/orientation direction of feed tape dimensions mm 1.50 typ 8.00 0.30 3.50 0.50 1 4.00 2.00 1.75 1.00 min 4.00 figure 8. sc?70/sc?88a/sot?353 dft2 and sot23?5/tsop?5/sc59?5 dtt1 reel configuration/orientation direction of feed tape dimensions mm 1.50 typ 8.00 0.30 3.50 0.50
MC74VHC1G50 http://onsemi.com 6 figure 9. reel dimensions 13.0 mm 0.2 mm (0.512 in 0.008 in) 1.5 mm min (0.06 in) 50 mm min (1.969 in) 20.2 mm min (0.795 in) full radius t max g a reel dimensions tape size 8 mm t and r suffix t1, t2 a max 178 mm (7 in) g 8.4 mm, + 1.5 mm, ?0.0 (0.33 in + 0.059 in, ?0.00) t max 14.4 mm (0.56 in) figure 10. reel winding direction direction of feed barcode label hole pocket
MC74VHC1G50 http://onsemi.com 7 package dimensions sc70?5/sc?88a/sot?353 df suffix 5?lead package case 419a?02 issue g notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a?01 obsolete. new standard 419a?02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl n j k ?b? figure 11. sc?88a/sc70?5/sot?353 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.65 0.025 0.65 0.025 0.50 0.0197 0.40 0.0157 1.9 0.0748 mm inches scale 20:1
MC74VHC1G50 http://onsemi.com 8 package dimensions sot23?5/tsop?5/sc59?5 dt suffix 5?lead package case 483?01 issue c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. a and b dimensions do not include mold flash, protrusions, or gate burrs. dim min max min max inches millimeters a 2.90 3.10 0.1142 0.1220 b 1.30 1.70 0.0512 0.0669 c 0.90 1.10 0.0354 0.0433 d 0.25 0.50 0.0098 0.0197 g 0.85 1.05 0.0335 0.0413 h 0.013 0.100 0.0005 0.0040 j 0.10 0.26 0.0040 0.0102 k 0.20 0.60 0.0079 0.0236 l 1.25 1.55 0.0493 0.0610 m 0 10 0 10 s 2.50 3.00 0.0985 0.1181 0.05 (0.002) 123 54 s a g l b d h c k m j __ _ _ figure 12. thin sot23?5/tsop?5/sc59?5 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.7 0.028 1.0 0.039 0.95 0.037 2.4 0.094 1.9 0.074 mm inches scale 10:1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 MC74VHC1G50/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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